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On the use of signed digit arithmetic for the new 6-inputs LUT based FPGAs
Details
On the use of signed digit arithmetic for the new 6-inputs LUT based FPGAs
Author(s)
ASI Sponsor
Cardarilli, G.C.
Pontarelli, S.
Re, M.
Date Issued
2008-08-01
URI
https://hdl.handle.net/20.500.13025/2388
Journal
2008 15th IEEE International Conference on Electronics, Circuits and Systems
URL
http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=4674925